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d a t a sh eet product speci?cation supersedes data of september 1994 file under integrated circuits, ic01 1998 jan 06 integrated circuits TDA1306T noise shaping filter dac
1998 jan 06 2 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T features general double-speed mode digital volume control soft mute function 12 db attenuation low power dissipation digital de-emphasis tda1305t pin compatible. easy application voltage output only 1st-order analog post-filtering required operational amplifiers and digital filter integrated selectable system clock (f sys ) 256f s or 384f s i 2 s-bus (f sys = 256f s ) or 16, 18 or 20 bits lsb fixed serial input format (f sys = 384f s ) single rail supply. high performance superior signal-to-noise ratio wide dynamic range no zero crossing distortion inherently monotonic continuous calibration digital-to-analog conversion combined with noise shaping technique. general description the TDA1306T is a dual cmos digital-to-analog converter with up-sampling filter and noise shaper. the combination of oversampling up to 4f s , noise shaping and continuous calibration conversion ensures that only simple 1st-order analog post-filtering is required. the TDA1306T supports the i 2 s-bus data input mode (f sys = 256f s ) with word lengths of up to 20 bits and the lsb fixed serial data input format (f sys = 384f s ) with word lengths of 16, 18 or 20 bits. two cascaded iir filters increase the sampling rate 4 times. the dacs are of the continuous calibration type and incorporate a special data coding. this ensures a high signal-to-noise ratio, wide dynamic range and immunity to process variation and component ageing. two on-board operational amplifiers convert the digital-to-analog current to an output voltage. ordering information type number package name description version TDA1306T so24 plastic small outline package; 24 leads; body width 7.5 mm. sot137 - 1
1998 jan 06 3 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T quick reference data all power supply pins v dd and v ss must be connected to the same external supply unit. symbol parameter conditions min. typ. max. unit supply v ddd digital supply voltage 4.5 5.0 5.5 v v dda analog supply voltage 4.5 5.0 5.5 v v ddo operational ampli?er supply voltage 4.5 5.0 5.5 v i ddd digital supply current v ddd =5v; at code 00000h - 58ma i dda analog supply current v dda =5v; at code 00000h - 35ma i ddo operational ampli?er supply current v ddo =5v; at code 00000h - 24ma analog signals v fs(rms) full-scale output voltage (rms value) v ddd =v dda =v ddo =5v; r l >5k w 0.935 1.1 1.265 v r l output load resistance 5 -- k w dac performance (thd + n)/s total harmonic distortion plus noise-to-signal ratio at 0 db signal level; f i = 1 khz; -- 70 - db - 0.032 - % at - 60 db signal level; f i = 1 khz; -- 42 - 32 db - 0.8 2.5 % s/n signal-to-noise ratio no signal; a-weighted -- 108 - 96 db br input bit rate at data input f s = 44.1 khz; normal speed -- 2.822 mbits/s f s = 44.1 khz; double speed -- 5.645 mbits/s f sys system clock frequency (pin 12) 6.4 - 18.432 mhz t amb operating ambient temperature - 40 - +85 c
1998 jan 06 4 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T block diagram fig.1 block diagram.
1998 jan 06 5 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T pinning symbol pin description v dda 1 analog supply voltage (+5 v) v ssa 2 analog ground test1 3 test input 1; pin should be connected to ground bck 4 bit clock input ws 5 word select input data 6 data input clks1 7 clock and format selection 1 input clks2 8 clock and format selection 2 input v ssd 9 digital ground v ddd 10 digital supply voltage (+5 v) test2 11 test input 2; pin should be connected to ground sysclk 12 system clock input 256f s or 384f s app3 13 application mode 3 input appl 14 application mode selection input app2 15 application mode 2 input app1 16 application mode 1 input app0 17 application mode 0 input v ol 18 left channel output filtcl 19 capacitor for left channel 1st order ?lter function; should be connected between pins 19 and 18 filtcr 20 capacitor for right channel 1st order ?lter function; should be connected between pins 20 and 21 v or 21 right channel output v ref 22 internal reference voltage for output channels; 0.5v ddo (typ.) v sso 23 operational ampli?er ground v ddo 24 operational ampli?er supply voltage fig.2 pin configuration.
1998 jan 06 6 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T functional description the TDA1306T cmos dac incorporates an up-sampling filter, a noise shaper, continuous calibrated current sources and operational amplifiers. system clock and data input format the TDA1306T accommodates slave mode only. consequently, in all applications, the system devices must provide the system clock. the system frequency is selectable at pins clks1 and clks2 (see table 1). the TDA1306T supports the following data input modes: i 2 s-bus with data word length of up to 20 bits (f sys = 256f s ) lsb fixed serial format with data word length of 16, 18 or 20 bits (f sys = 384f s ). as this format idles on the msb it is necessary to know how many bits are being transmitted. the input formats are illustrated in fig.9. left and right data channel words are time multiplexed. table 1 data input format and system clock clks1 clks2 data input format system clock normal speed double speed 00i 2 s-bus 256f s 128f s 0 1 lsb ?xed 16 bits 384f s 192f s 1 0 lsb ?xed 18 bits 384f s 192f s 1 1 lsb ?xed 20 bits 384f s 192f s device operation when the appl pin is held high and app3 is held low, pins app0, app1 and app2 form a microcontroller interface. when the appl pin is held low, pins app0, app1, app2 and app3 form a pseudo-static application (tda1305t pin compatible). p seudo - static application mode (appl = logic 0) in this mode, the device operation is controlled by pseudo-static application pins where: app0 = attenuation mode control app1 = double-speed mode control app2 = mute mode control app3 = de-emphasis mode control. in the pseudo-static application mode the TDA1306T is pin compatible with the tda1305t slave mode. the correspondence between TDA1306T pin number, TDA1306T pin name, tda1305t pin mnemonic and a description of the effects is given in table 2.
1998 jan 06 7 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T table 2 pseudo-static application mode pin mnemonic pin number tda1305t function value description app0 17 atsb 0 12 db attenuation (from full scale) activated (only if musb = logic 1) 1 full scale (only if musb = logic 1) app1 16 dsmb 0 double-speed mode 1 normal-speed mode app2 15 musb 0 samples decrease to mute level 1 level according to atsb app3 13 deem1 0 de-emphasis off (44.1 khz) 1 de-emphasis on (44.1 khz) m icrocontroller application mode (appl = logic 1 and app3 = logic 0) in this mode, the device operation is controlled by a set of flags in an 8-bit mode control register. the 8-bit mode control register is written by a microcontroller interface where: appl = logic 1 app0 = data app1 = clock app2 = rab app3 = logic 0. the correspondence between serial-to-parallel conversion, mode control flags and a summary of the effect of the control flags is given in table 3. figures 3 and 4 illustrate the mode set timing. m icrocontroller write operation sequence the microcontroller write operation follows the following sequence: app2 is held low by the microcontroller microcontroller data is clocked into the internal shift register on the low-to-high transition on pin app1 data d7 to d0 is latched into the appropriate control register on the low-to-high transition of pin app2 (app1 = high) if more data is clocked into the TDA1306T before the low-to-high transition on pin app2 then only the last 8 bits are used if less data is clocked into the TDA1306T unpredictable operation will result if the low-to-high transition of pin app2 occurs when app1 = low, the command will be disregarded. fig.3 microcontroller timing.
1998 jan 06 8 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T m icrocontroller write operation sequence ( repeat mode ) the same command can be repeated several times (e.g. for fade function) by applying app2 pulses as shown in fig.4. it should be noted that app1 must stay high between app2 pulses. a minimum pause of 22 m s is necessary between any two step-up or step-down commands. table 3 microcontroller mode control register bit position function description active level d7 atsb 12 db attenuation (from full scale) low d6 dsmb double speed low d5 musb mute low d4 deem de-emphasis high d3 fs full scale high d2 incr increment high d1 decr decrement high d0 not applicable reserved not applicable fig.4 microcontroller timing (repeat mode).
1998 jan 06 9 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T volume control a digital level control is incorporated in the TDA1306T which performs the function of soft mute and attenuation (pseudo-static application mode) or soft mute, attenuation, fade, increment and decrement (microcontroller application mode). the volume control of both channels can be varied in small step changes determined by the value of the internal fade counter where: audio level = counter maximum level/120. where the counter is a 7-bit binary number between 0 and 120. the time taken for mute to vary from 120 to 0 is 1/120f s . for example, when f s = 44.1 khz, the time taken is approximately 3 ms. v olume control ( pseudo - static application mode ) in the pseudo-static application mode (appl = logic 0) the digital audio output level is controlled by app0 (attenuation) and app2 (mute) so only the final volume levels full scale, 12 db (attenuate) and mute ( - infinity db) can be selected. the mute function has priority over the attenuation function. accordingly, if musb is low, the state of atsb has no effect. an example of volume control in this application mode is illustrated in fig.5. fig.5 volume control (pseudo-static application mode).
1998 jan 06 10 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T v olume control ( microcontroller application mode ) in the microcontroller application mode (appl = logic 1, app3 = logic 0) the audio output level is controlled by volume control bits atsb, musb, fs, incr and decr. mute is activated by sending the musb command to the mode control register via the microcontroller interface. the audio output level will be reduced to zero in a maximum of 120 steps (depending on the current position of the fade counter) and taking a maximum of 3 ms. mute, attenuation and full scale are synchronized to prevent operation in the middle of a word. the counter is preset to 120 by the full scale command the counter is preset to 30 by the attenuate command when its value is more then 30. if the value of the counter is less than 30 db the atsb command has no effect. the counter is preset to logic 0 by the mute command musb attenuation ( - 12 db) is activated by sending the atsb command to the fade control register (d7) attenuation and mute are cancelled by sending the full-scale command to the fade control register (register d3). to control the fade counter in a continuous way, the increment and decrement commands are available (fade control registers d1 and d2). they will increment and decrement the counter by 1 for each register write operation. when issuing more than 1 step-up or step-down command in sequence, the write repeat mode may be used (see microcontroller application mode). an example of volume control in this application mode is illustrated in fig.6. fig.6 volume control (microcontroller application mode). (1) incr and decr in repeat mode.
1998 jan 06 11 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T there are two recommended application situations within the microcontroller mode: the customer wants to use the microcontroller interface without the volume setting facility. in this event the operation is as follows: C mute on; by sending the musb command C mute off; by sending the fs command C attenuation on; by sending the atsb command C attenuation off; by sending the fs command. it is possible to switch from attenuation on to mute on but not vice-versa. incorporating the volume control feature operates as follows: C mute on; by sending the musb command the microcontroller has to store the previous volume setting C mute off; by sending succeeding incr commands until the previous volume is reached C attenuation on; by sending succeeding decr commands until a relative downstep of - 12 db is reached. the microcontroller has to store the previous volume C attenuation off; by sending the succeeding incr commands until the previous volume is reached C volume up; by sending succeeding incr commands C volume down; by sending succeeding decr commands. de-emphasis a digital de-emphasis is implemented in the TDA1306T. by selecting the deem bit at register d4 (microcontroller application mode) or activating the app3 pin (pseudo-static application mode), de-emphasis can be applied by means of an iir filter. de-emphasis is synchronized to prevent operation in the middle of a word. double-speed mode the double-speed mode is controlled by the dsmb bit at register d6 (microcontroller application mode) or by activating the app1 pin (pseudo-static application mode). when the control bit is active low the device operates in the double-speed mode. oversampling ?lter and noise shaper the digital filter is a four times oversampling filter. it consists of two sections which each increase the sample rate by 2. the noise-shaper operates on 4f s and reduces the in-band noise density. dac and operational ampli?ers in this noise shaping filter dac a special data code and bidirectional current sources are used in order to achieve true low-noise performance. the special data code guarantees that only small values of current flow to the output during small signal passages while larger positive or negative values are generated using the bidirectional current sources. the noise shaping filter-dac uses the continuous calibration conversion technique. the operational amplifiers and the internal conversion resistors r conv1 and r conv2 convert the dac current to an output voltage available at v ol and v or . connecting an external capacitor between filtcl and v ol , filtcr and v or respectively provides the required 1st-order post filtering.
1998 jan 06 12 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T limiting values in accordance with the absolute maximum rating system (iec 134). notes 1. all v dd and v ss connections must be made to the same power supply. 2. equivalent to discharging a 100 pf capacitor via a 1.5 k w series resistor. 3. equivalent to discharging a 200 pf capacitor via a 2.5 mh series inductor. thermal characteristics quality specification in accordance with uzw-bo/fq-0601. symbol parameter conditions min. max. unit v dd supply voltage note 1 - 7.0 v t xtal maximum crystal temperature - +150 c t stg storage temperature - 65 +125 c t amb operating ambient temperature - 40 +85 c v es electrostatic handling note 2 - 2000 +2000 v note 3 - 200 +200 v symbol parameter conditions value unit r th j-a thermal resistance from junction to ambient in free air 69 k/w
1998 jan 06 13 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T dc characteristics v ddd =v dda =v ddo = 5 v; t amb =25 c; all voltages referenced to ground (pins 2, 9 and 23); unless otherwise specified. notes 1. all power supply pins (v dd and v ss ) must be connected to the same external power supply unit. 2. r l is the ac resistance of the external circuitry connected to the audio outputs of the application circuit. symbol parameter conditions min. typ. max. unit v ddd digital supply voltage (pin 10) note 1 4.5 5.0 5.5 v v dda analog supply voltage (pin 1) note 1 4.5 5.0 5.5 v v ddo operational ampli?er supply voltage (pin 24) note 1 4.5 5.0 5.5 v i ddd digital supply current f sys = 11.28 mhz - 58ma i dda analog supply current at digital silence - 36ma i ddo operational ampli?er supply current no operational ampli?er load resistor - 24ma p tot total power dissipation f sys = 11.28 mhz; digital silence; no operational ampli?er load resistor - 50 90 mw v ih high level digital input voltage (pins 3 to 8 and 11 to 17) 0.7v ddd - v ddd + 0.5 v v il low level digital input voltage (pins 3 to 8 and 11 to 17) - 0.5 - +0.3v ddd v r pd internal pull-down resistor to v ssd (pins 3 and 11) 17 - 134 k w |i li | input leakage current -- 10 m a c i input capacitance -- 10 pf v ref reference voltage (pin 22) with respect to v sso 0.45v ddo 0.5v ddo 0.55v ddo v r conv current-to-voltage conversion resistor 2.4 3.0 3.6 k w v fs(rms) full-scale output voltage (rms value) r l >5k w ; note 2 0.935 1.1 1.265 v r l output load resistance 5 -- k w
1998 jan 06 14 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T ac characteristics (analog) v ddd =v dda =v ddo = 5 v; t amb =25 c; all voltages referenced to ground (pins 2, 9 and 23); unless otherwise specified. symbol parameter conditions min. typ. max. unit dacs svrr supply voltage ripple rejection v dda and v ddo f ripple = 1 khz; v ripple = 100 mv (p-p); c22 = 10 m f - 40 - db d g v unbalance between the 2 dac voltage outputs (pins 18 and 21) maximum volume -- 0.5 db a ct crosstalk between the 2 dac voltage outputs (pins 18 and 21) one output digital silence the other maximum volume -- 110 - 85 db (thd + n)/s total harmonic distortion plus noise-to-signal ratio at 0 db signal level; f i = 1 khz -- 70 - db - 0.032 - % at - 60 db signal level; f i = 1 khz -- 42 - 32 db - 0.8 2.5 % s/n signal-to-noise ratio no signal; a-weighted -- 108 - 96 db operational ampli?ers g v open-loop voltage gain - 85 - db psrr power supply rejection ratio f ripple = 3 khz; v ripple = 100 mv (p-p); a-weighted - 90 - db (thd + n)/s total harmonic distortion plus noise-to-signal ratio r l >5k w ;f i = 1 khz ; v o = 2.8 v (p-p) -- 100 - db f ug unity gain frequency open loop - 4.5 - mhz |z o | ac output impedance r l >5k w- 1.5 150 w
1998 jan 06 15 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T ac characteristics (digital) v ddd =v dda =v ddo 4.5 to 5.5 v; all voltages referenced to ground (pins 2, 9 and 23); t amb = - 40 to +85 c; unless otherwise specified. notes 1. a clock frequency of up to 96f s is possible in the event of a rising edge of bck occurring during sysclk = low. 2. a clock frequency of up to 64f s is possible in the event of a rising edge of bck occurring during sysclk = low. symbol parameter conditions min. typ. max. unit t wx clock cycle time f sys = 384f s ; normal speed 54.2 59.1 104 ns f sys = 192f s ; double speed 54.2 59.1 104 ns f sys = 256f s ; normal speed 81.3 88.6 156 ns f sys = 128f s ; double speed 81.3 88.6 156 ns t cwl f sys low level pulse width 22 -- ns t cwh f sys high level pulse width 22 -- ns serial input data timing (see fig.8) f s word select input audio sample frequency normal speed 25 44.1 48 khz double speed 50 88.2 96 khz f bck clock input frequency (data input rate) f sys = 384f s ; normal speed; note 1 -- 64f s khz f sys = 192f s ; double speed; note 1 -- 64f s khz f sys = 256f s ; normal speed -- 64f s khz f sys = 128f s ; double speed; note 2 -- 48f s khz t r rise time -- 20 ns t f fall time -- 20 ns t h bit clock high time 55 -- ns t l bit clock low time 55 -- ns t su data set-up time 20 -- ns t h data hold time 10 -- ns t suws word select set-up time 20 -- ns t hws word select hold time 10 -- ns microcontroller interface timing (see fig.9) t l input low time 2 --m s t h input high time 2 --m s t sudc set-up time data to clock 1 --m s t hcd hold time clock to data 1 --m s t sucr set-up time clock to rab 1 --m s
1998 jan 06 16 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T fig.7 data input formats.
1998 jan 06 17 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T fig.8 timing of input signals. fig.9 microcontroller timing.
1998 jan 06 18 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T test and application information filter characteristics table 4 digital ?lter speci?cation (f s = 44.1 khz) table 5 digital ?lter phase distortion (f s = 44.1 khz) band attenuation 0 to 19 khz < 0.001 db 19 to 20 khz < 0.03 db 24 khz > 25 db 25 to 35 khz > 40 db 35 to 64 khz > 50 db 64 to 68 khz > 31 db 68 khz > 35 db 69 to 88 khz > 40 db band phase distortion 0 to 16 khz < 1
1998 jan 06 19 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T package outline unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p q z y w v q references outline version european projection issue date iec jedec eiaj mm inches 2.65 0.30 0.10 2.45 2.25 0.49 0.36 0.32 0.23 15.6 15.2 7.6 7.4 1.27 10.65 10.00 1.1 1.0 0.9 0.4 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 1.1 0.4 sot137-1 x 12 24 w m q a a 1 a 2 b p d h e l p q detail x e z c l v m a 13 (a ) 3 a y 0.25 075e05 ms-013ad pin 1 index 0.10 0.012 0.004 0.096 0.089 0.019 0.014 0.013 0.009 0.61 0.60 0.30 0.29 0.050 1.4 0.055 0.419 0.394 0.043 0.039 0.035 0.016 0.01 0.25 0.01 0.004 0.043 0.016 0.01 e 1 0 5 10 mm scale so24: plastic small outline package; 24 leads; body width 7.5 mm sot137-1 95-01-24 97-05-22
1998 jan 06 20 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T soldering introduction there is no soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. however, wave soldering is not always suitable for surface mounted ics, or for printed-circuits with high population densities. in these situations reflow soldering is often used. this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our ic package databook (order code 9398 652 90011). re?ow soldering reflow soldering techniques are suitable for all so packages. reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several techniques exist for reflowing; for example, thermal conduction by heated belt. dwell times vary between 50 and 300 seconds depending on heating method. typical reflow temperatures range from 215 to 250 c. preheating is necessary to dry the paste and evaporate the binding agent. preheating duration: 45 minutes at 45 c. wave soldering wave soldering techniques can be used for all so packages if the following conditions are observed: a double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. the longitudinal axis of the package footprint must be parallel to the solder flow. the package footprint must incorporate solder thieves at the downstream end. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. maximum permissible solder temperature is 260 c, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 c within 6 seconds. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. repairing soldered joints fix the component by first soldering two diagonally- opposite end leads. use only a low voltage soldering iron (less than 24 v) applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
1998 jan 06 21 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation.
1998 jan 06 22 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T notes
1998 jan 06 23 philips semiconductors product speci?cation noise shaping ?lter dac TDA1306T notes
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semiconductors, 6f, no. 96, chien kuo n. rd., sec. 1, taipei, taiwan tel. +886 2 2134 2865, fax. +886 2 2134 2874 thailand: philips electronics (thailand) ltd., 209/2 sanpavuth-bangna road prakanong, bangkok 10260, tel. +66 2 745 4090, fax. +66 2 398 0793 turkey: talatpasa cad. no. 5, 80640 gltepe/istanbul, tel. +90 212 279 2770, fax. +90 212 282 6707 ukraine : philips ukraine, 4 patrice lumumba str., building b, floor 7, 252042 kiev, tel. +380 44 264 2776, fax. +380 44 268 0461 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. +44 181 730 5000, fax. +44 181 754 8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. +1 800 234 7381 uruguay: see south america vietnam: see singapore yugoslavia: philips, trg n. pasica 5/v, 11000 beograd, tel. +381 11 625 344, fax.+381 11 635 777 for all other countries apply to: philips semiconductors, international marketing & sales communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 34 waterloo road, north ryde, nsw 2113, tel. +61 2 9805 4455, fax. +61 2 9805 4466 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 160 1010, fax. +43 160 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 200 733, fax. +375 172 200 773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 689 211, fax. +359 2 689 102 canada: philips semiconductors/components, tel. +1 800 234 7381 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: prags boulevard 80, pb 1919, dk-2300 copenhagen s, tel. +45 32 88 2636, fax. +45 31 57 0044 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 9 615800, fax. +358 9 61580920 france: 51 rue carnot, bp317, 92156 suresnes cedex, tel. +33 1 40 99 6161, fax. +33 1 40 99 6427 germany: hammerbrookstra?e 69, d-20097 hamburg, tel. +49 40 23 53 60, fax. +49 40 23 536 300 greece: no. 15, 25th march street, gr 17778 tavros/athens, tel. +30 1 4894 339/239, fax. +30 1 4814 240 hungary: see austria india: philips india ltd, band box building, 2nd floor, 254-d, dr. annie besant road, worli, mumbai 400 025, tel. +91 22 493 8541, fax. +91 22 493 0966 indonesia: see singapore ireland: newstead, clonskeagh, dublin 14, tel. +353 1 7640 000, fax. +353 1 7640 200 israel: rapac electronics, 7 kehilat saloniki st, po box 18053, tel aviv 61180, tel. +972 3 645 0444, fax. +972 3 649 1007 italy: philips semiconductors, piazza iv novembre 3, 20124 milano, tel. +39 2 6752 2531, fax. +39 2 6752 2557 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108, tel. +81 3 3740 5130, fax. +81 3 3740 5077 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381 middle east: see italy printed in the netherlands 547027/1200/02/pp24 date of release: 1998 jan 06 document order number: 9397 750 03168

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